tests/test-linelog.py
branchstable
changeset 44129 84a0102c05c7
parent 43992 e52a9c85a7a8
child 45942 89a2afe31e82
equal deleted inserted replaced
44048:61881b170140 44129:84a0102c05c7
   170         ):
   170         ):
   171             if usevec:
   171             if usevec:
   172                 ll.replacelines_vec(rev, a1, a2, blines)
   172                 ll.replacelines_vec(rev, a1, a2, blines)
   173             else:
   173             else:
   174                 ll.replacelines(rev, a1, a2, b1, b2)
   174                 ll.replacelines(rev, a1, a2, b1, b2)
   175             ar = ll.annotate(rev)
   175             ll.annotate(rev)
   176             self.assertEqual(ll.annotateresult, lines)
   176             self.assertEqual(ll.annotateresult, lines)
   177         # Verify we can get back these states by annotating each rev
   177         # Verify we can get back these states by annotating each rev
   178         for lines, rev, a1, a2, b1, b2, blines, usevec in _genedits(
   178         for lines, rev, a1, a2, b1, b2, blines, usevec in _genedits(
   179             seed, numrevs
   179             seed, numrevs
   180         ):
   180         ):